Page 33 - Application Guide Semiconductor Fuse Link

Forced commutated inverters

Under these conditions the interruption
of the fault current will be rapid (less 500
than 10ms), and against the decreasing
voltage from the discharging capacitor.
This condition is similar to that which
250 capacitor voltage
occurs when a.c. type-testing of fuses
at high current (~100kA), when the
circuit is closed at about 65° on the
applied voltage wave. However as soon 0
as arcing begins the voltage applied 0 0.005 time, s 0.01
to the fuse becomes d.c. rather than
oscillatory (the circuit is overdamped by
-250
the arc resistance). For these reasons
choice of a fuse for inverter applications
depends upon the initial maximum 20000
capacitor voltage (EM) and also voltage
across the capacitor (UPM ) at the start of 15000 fault current
arcing. For some fuses EM and UPM are
the same but for other types UPM can be 10000
lower than EM. Fuses with a trip indicator
may have lower EM and UPM values than 5000
fuses without an indicator. The Ferraz
Shawmut publication NTSC120 gives 0
0 0.005 0.01
these values for a selection of fuse types
-5000
as well as curves allowing calculation
of the total I t and other parameters. As
2
2
an alternative, the let-through I t and
clearing time can be computed using
a transient model which represents the Fig.26 Short-circuit waveform for internal fault
interaction between the fuse and the
circuit, including the charging source.
This is a complex procedure and is
unsuitable for hand calculation. It is the method built in to the Select-A-Fuse for Power Electronics
software. (See section 18).

When a single F2 fuse is used it must be rated for the full d.c. voltage. If two fuses are used, they
can be assumed to share the breaking duty, because the operation is normally so fast that both
2
fuses will melt. A voltage reduction factor of 0.6 can then be used for the calculation of the I t. If the
fuses were to operate in situations other than a perfect short-circuit fault, the melting times could be
much longer, and one fuse would melt fi rst and have to clear the circuit on its own against the full
d.c. voltage. Therefore for safety reasons each fuse should be rated for full d.c. voltage. Satisfactory
protection of the devices may not be possible under these circumstances, but it is essential that
such faults should be cleared safely. It is recommended that the fuse selected should clear the circuit
within 10ms.

Skin and proximity effects

As the frequency increases, the current in a conductor tends to shift towards the outside surface of
the conductor (or group of conductors) due to the skin effect. If the return path for the current is near
that conductor or conductor group, this causes an additional shift of current within the conductor,
towards the return path. This is the proximity effect, and like skin effect, it increases with frequency.
Inductance is fl ux linkage per ampere, and the inductance of an electric circuit may be separated into
two parts. The internal inductance is due to the fl ux linkages within the conductor, while the external
inductance is due to the fl ux linkage of the loop external to the conductor. As frequency increases
the total inductance initially decreases because of the decrease in internal fl ux due to skin effect. At
very high frequencies only external inductance remains.
At high-frequencies a multiplying coeffi cient CPE must be applied to the fuse rated current, to allow
for the extra heating of the fuse caused by skin and proximity effects (see section 5).

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